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Hardware Implementation of Support Vector Machine(SVM) on FPGAs

This paper revolves around Hardware Implementation of Support Vector Machine(SVM) on FPGAs. Additionally, it focuses on Hardware architecture for a Support Vector Machine, CORDIC algorithm, hardware-friendly kernel function, and input images.

Instructions

Hardware Implementation of Support Vector Machine(SVM) on FPGAs

In this paper, you have to present

  • Hardware architecture for a Support Vector Machine intended for vision applications to be implemented in a FPGA device.
  • The contribution of each support vector in parallel without performing multiplications by using a CORDIC algorithm.
  • A hardware-friendly kernel function.
  • Why input images are not pre-processed for feature extraction. 



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